1. Field of the Invention:
The present invention relates to a circuit arrangement for clock regeneration in clock-controlled information processing systems and more specifically to generation of a clock from a distorted incoming clock.
2. Description of the Prior Art
The German patent applications 32 27 848 C2 and 32 27 849 C2 disclose circuit arrangements on the basis of voltage-controlled oscillators that can be employed for clock regeneration. However, in combination with clock-controlled switching systems, for example, problems very often arise that can no longer be governed with the known circuit arrangements. Offering transmission paths for an interruption-free message flow plays an overriding role in information processing systems. To this end, the message paths are redundantly designed in parallel. The realization of these parallel paths therefore occurs by doubling the equipment. The reliability lying in the redundancy can be realized in that a switch to the parallel path is respectively undertaken in case of malfunction. Such a malfunction is always established when the message flow or, respectively, the bit stream allocated thereto is deteriorated in some way or is even interrupted. This triggers a switching or rerouting, in particular onto the respective back-up route. An additional disturbance, however, can always arise when the synchronism between the two bit streams is not established. The synchronism can be deteriorated by distortions of the controlling clock, for example in frequency and/or phase.
The offering of a clock grid that has high-quality coincidence and is uniform in phase and frequency is required in order to eliminate distortion problems. Such a uniform clock grid having high-quality coincidence is acquired on the basis of a central clock (see the German patent 31 11 022), whereby, however, this central clock can be distorted due to transit time and/or component tolerances such that it no longer immediately satisfies the requirements made thereof and can therefore no longer be directly employed.
Circuit arrangements for clock regeneration are required for this reason. Clock regeneration devices constructed of voltage-controlled oscillators, as disclosed in the aforementioned patent applications, however, have the following disadvantages:
1. The synchronism vis-a-vis frequency and phase relation between the synchronizing clock and the regenerated clock with the aforementioned circuit arrangements constructed on the basis of voltage-controlled oscillators cannot be guaranteed, as practical experience has shown. The phase relationship required for the synchronization of signals with respect to frequency and phase relation is therefore not met; and PA0 2. Due to the locking behavior of the feedback device, individual noise infeeds, for example infeeds in the form of spike pulses, can occur due to the influence of lightning of the subscriber line, and lead to longer-lasting deviations in frequency and phase relations and, accompanying this, lead to a falsification of the transmitted information. PA0 1. Guarantees a phase synchronism between the input and output signals; and PA0 2. Avoids longer-lasting frequency deviations due to individual noise infeeds, for example in the form of spike pulses.